I have four Boolean functions for four outputs, one for each. I've found the equivalent logic circuits for each in what I believe to be the simplest form but that is what I'm asking. Can these circuits be simplified more in any way so to minimise the chip (logic gate) count?
Not sure how to embed pictures but here are the Booleans: $$a) AD'+AB'C'$$ $$b) ABD'$$ $$c) B'CD'+ACD'$$ $$d)B'C'D$$ I realise I can rewrite a) and c) but do I want to? My aim is to get a circuit with as little logic gates as possible. I was thinking I could use a NOR gate followed by an OR gate for a) to reduce the number of NOT gates I'd need.