I am having trouble mathematically representing boolean logic gates that have logical hysteresis as they have "state". In asynchronous circuits for example, I have something similar to a AND gate called a Muller C-element that is very much like a logical AND, but the logic is different depending on the initial condition. Starting from 0,0, the truth table is identical to the AND:
A | B | S 0 | 0 | 0 0 | 1 | 0 1 | 0 | 0 1 | 1 | 1
This results in the boolean equation $S = A \land B$; however, starting from 1,1, the truth table is:
A | B | S 0 | 0 | 0 0 | 1 | 1 1 | 0 | 1 1 | 1 | 1
The fundamental issue that I am having is that this logic gate has "state". Even if I describe the gate using pure boolean logic (I can build a static c-element with 3x ANDs and a 3-input OR), I still have the issue of state when describing the function.
Is there an method in boolean mathematics to define pure boolean logic that has state dependence?