Parity Checking and truth tables

I have a question that I am very confused about.

Parity Checking.

1. Produce a truth table for a parity checking circuit that is based on $4$ input data bits, an input parity bit and a single output bit that reflects whether an error has occurred. The parity bit is based on even parity.

2. Produce an algebraic form for the output bit.

My problem is for (1.)

I realize that I will have a truth table with $16$ different options. ($a, b, c, d$ data inputs) and then I will have a $5^{\rm th}$ column for the parity bit. I will calculate the parity bit by making it a $1$ if the input bits add up to an odd number.

I am asked to make the truth table for this, but my problem is with the output column. Since I already based my parity bit on even parity won't my output bit always be $0$?

Any help or tips would be greatly appreciated.

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You need a table with 5 input bits, including the parity bit, and thus 32 rows. The output column is a bit indicating either "good" or "error". –  Henning Makholm Oct 28 '11 at 1:16
Ok, I see what you mean, but does it seem plausible because with that, I will have 16 different 1s, and I have to draw a circuit diagram from all 1s. Also, the algebraic expression will be huge no? And I won't be able to simplify down very much since there are 5 input bits –  Cheesegraterr Oct 28 '11 at 1:23
You shouldn't try to construct the algebraic expression systematically from the truth table here. Instead figure out how you decided which values to fill into the truth table, and write down an algebraic expression that does the same thing. –  Henning Makholm Oct 28 '11 at 1:28
So you are saying that I should randomly put 1s on the output and then make the algebraic expression off of that? Because wouldn't that be very difficult to mark as a teacher because we also have to make the algebraic express, condense it down, and then make a circuit diagram out of it. –  Cheesegraterr Oct 28 '11 at 1:37
No, that is not at all what I'm saying. There is a right answer for each of the 32 rows. You know how to find that right answer -- construct your circuit such that it produces the right answer in the same way you do yourself. –  Henning Makholm Oct 28 '11 at 1:40

$$\begin{array}{ccc|l} a&b&parity&out\\ \hline \\ 0&0&0&1 \\ 1&0&0&0 \\ 0&1&0&0 \\ 1&1&0&1 \\ 0&0&1&0 \\ 1&0&1&1 \\ 0&1&1&1 \\ 1&1&1&0 \end{array}$$
This shows the definition of the output bit as the negation of the XOR of the other bits - and that representation, incidentally, makes the algebraic expression much easier to find (hint: how can you express $a$ XOR $b$ algebraically? Having that 'subroutine' will make the overall job much simpler).