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From what I understand from my lecture notes, overflow occurs when:

  • $C_{in} \neq C_{out}$
  • Change in sign

For $C_{in} \neq C_{out}$: suppose $111+111=1110=110$. In this case $C_{in}=0, C_{out}=1$, but consider a carry in then: $111+111+1=1111=111$ which according my the rules 1 above, is NOT overflow... so I suppose my understanding is wrong? If so how will I determine overflow systematically?

UPDATE

For those who are not sure what $C_{in}, C_{out}$ means and how to add/subtract binary, I hope the below working will help

enter image description here

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Maybe you elaborate what you mean by $C_{\rm in}$ and $C_{\rm out}$ and give other details as well (things like: how are negative numbers represented, and so on), so readers don't have to guess all this. –  Florian Sep 19 '11 at 15:09
    
@Florian, I updated my question. I wonder tho if this should be in electronics.stackexchange instead ... –  Jiew Meng Sep 20 '11 at 3:13

1 Answer 1

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I think you have to specify, what your sign bit is (I assume the left most) and then treat every addition separately $$ \begin{eqnarray*} 0\_111&+&0\_111&+&0\_001 & = 1\_110 &+&0\_001&= 1\_111 \\ 7&+&7&+&1&\neq_{a}-6&+&1&\neq_b-7\\ \end{eqnarray*} $$ to get $a.$ your overflow, followed by $b.$ nonsense.

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