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Could someone check over my answers to verify I am correct.

Say we have a memory consisting of 2048 locations, and each location contains 16 bits.

◦ A) How many bits are required for the address? Answer: 11 bits

◦ B) If we use the PC-relative addressing mode, and want to allow control transfer between instructions 20 locations away, how many bits of a branch instruction are needed to specify the PC-relative offset? Answer: ±20 gives a range of 40, therefore need 6 bits.

◦ C) If a control instruction is in location 3, what is the PC-relative offset of address 10. Assume that the control transfer instructions work the same way as in the LC-3. Answer: PC counter is incremented to 4, 10-4 = 6.

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  1. Yes, because $2^{11}=2048$
  2. Yes, because $2^5<40<2^6$
  3. Yes (although I don't know what you mean by LC-3). After each instruction, the program counter is automatically incremented. So to go 7 locations from the current location, you'll need to add 6 aside from the 1 automatically added.

That said, you might want to ask questions like these at, which I think is more appropriate.

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